Tag: fpga verilog2022-06-14Icarus verilog的简单命令使用以及和visual code的搭配使用2022-06-12ALTERA verilog Error (12007):Top-level design entity is undefined1categoriesNone.tagsverilog logic definition1verilog2uclinux1terminal powershell1openwrt overlay1openwrt compile1fpga verilog2fpga testbench1cpp study1cmake1aosp risc-v1amd tpm1